TM 9-4935-481-14-1
to calibrate the TTS. Positions 1 and 2 are semi-automatic, in that the various signals cycle between two different amplitudes
(e)
Function test switch S21 is used primarily for TTS power control, but also commands several functions
while the appropriate logic in the TTS is controlled by the DMS. The operator is also informed of when to adjust the TTS
trimpots by observing the align lamp on-off cycle. Positions 3 through 6 simply provide fixed voltages on the sum and within the DMS-D.
difference and horizontal wire lines as another reference for calibration. Table 3-5 depicts each Align output.
1.
The overvoltage position supplies a ground to one end of a 2.32K resistor, with the other end
4.
The off position, besides forcing all simulator outputs 0, also removes power to the sum
o t
connected to the J1 overvoltage stimuli jack.
and difference oscillator on Card A2. This feature reduces the noise pickup on the detector A and B outputs when those
signals are in use.
2.
The +5V crowbar, -13V crowbar, and +13V crowbar positions check the TTS power supply
crowbar function by applying +5 Vdc, analog ground, and +13 Vdc in the respective switch position. A five second delay
(d) All sequenced signals in the TTS portion are referenced to a Ts starting point, which is generated by (after test tart) occurs before the signal is applied to avoid making the test immediately after power-up. Only one signal is
test start switch S20. Without the UUT, actuation of the test start switch generates a 120 msec logic level pulse in the DMS- used at a time; i.e., in the +5V crowbar position, +5 Vdc appears at J7-7 after five seconds, while the other two signals at J7-
D that is used as a reset for the timing logic as follows:
5 and J7-6 are open circuits.
3.
In the internal clock position, a clock pulse generated by the 10 KHz oscillator internal to the
DMS-D is used to drive the master counter circuits. This position is used primarily for DMS-D testing without the MTS or
TTS, since connection of the MTS automatically selects the internal clock and TTS testing requires use of the TTS clock in
order for the units to be synchronized.
4.
Power to the TTS is selected by the +24V regulator and +14V regulator positions. In the
+24V regulator position (as well as all other positions except +14V regulator) +25 and -25 Vdc is fed through diodes to the
UUT power input. The +14V regulator position selects the output from the regulators described in paragraph 3-2.b.(3).(c).
5.
In order to check the amplitude of the trigger safe and trigger pulse simulators while in the
automatic mode, and the vertical pulse simulator while in either manual or automatic mode, the function test switch may be
set to the pulse read position. This position controls the appropriate logic so that the above mentioned pulses may be held in
their "high" state and the amplitude read on the DMM via the selector switches. If, for example, it was desired to set the
amplitude of the vertical wire pulse (manual mode) to +7.500 Vdc, selector B would be set to F4 (vertical wire monitor),
When the TTS is cabled to the DMS-D, actuation of the test start switch applies power to the TTS, initiating a separate test selector A to I-23 (parallels selector B), function test to pulse read, vertical wire simulator +dc/pulse/-dc to pulse, and DMM
start signal in the TTS that also controls the DMS-D logic. This pulse is approximately 1.9 seconds in duration to allow for input to selector A. Actuation of the test start switch would then initiate the vertical wire pulse, except that it would remain
power regulator stabilization. Re-actuation of the switch will then remove power to the TTS, providing at least one second is locked in its "high" state as shown below:
allowed after the time the reset signal goes high. By having the DMS-D use the TTS test start (as well as the TTS master
clock), the two units are perfectly synchronized, and all events are related to a common time baseline.
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