TM9-4935-481-14-1
C2
scaled voltage levels are measured at pins P1-38 and P1-40. The IR source control calibration voltage is measured at P1-
P1-82 and P1-84. The AR5, Q1 and Q2 configuration provides a closed loop gain of +1.05. The output, at the junction of Q1
48.
and Q2, is a sinewave, averaged about zero, with an amplitude of 10.29 VP (nominal). Q1 and Q2 output is connected to
buffer AR7 and relays K2-7 and K3-2.
(c) After completion of the tests on the scaling resistors, a sinewave of 10.29 VPK, averaged about zero, is
connected to P1-60. A cosine wave, 90 degrees out of phase with the sinewave, is connected to Pl-14. The amplitude of the
(g) The input signal to K2 and K3 is connected, through resistive voltage dividers, to the non-inverting inputs of
cosine wave is approximately 2.18 VPK. In the test mode configuration P1-23 is connected to P1-38 and P1-21 is connected
operational amplifiers AR8 and AR9. In the test mode configuration a 1.0K ohm resistor is connected between P1-18 and
to P1-40.
P1-22. Another 1.0K ohm resistor is connected between P1-26 and P1-30. The amplifiers have a gain of +1.05. With K2
and K3 deenergized, the output of AR8 and AR9 is a sinewave, averaged about zero, with an amplitude of .312 VP
(d) Plus 2.5 Vdc reference voltages are connected to P1-25 and P1-29, respectively. The voltages are
(nominal). With K2 and K3 energized, the amplitude of the sinewave is 4.900 VP (nominal).
connected, through buffer AR1, to the non-inverting input of AR2. The cosine signal is connected, through buffer AR3 and
relay K18, to the inverting input of AR2. AR2 is a voltage comparator of the open collector type, i.e., the output is a transistor
(h) In the test configuration, the output of AR8 (P1-20) is connected to P1-9 and the output of AR9 (P1-2 ) is
8
whose collector is biased with +5.0 Vdc through R36. Therefore, the output of AR2 will switch between zero and +5.0 Vdc.
connected to P1-5. The input signals to P1-9 and P1-5 are connected, through isolation resistors R35 and R34, respectively,
to buffers AR11 and AR10, respectively and FET switch S2. S2, through its ON resistance (50 ohms minimum) grounds the
(e) The output of AR2 is connected to a monostable flip flop (Z1). Z1 is connected such that it will trigger only
inputs to AR11 and AR10 when a positive voltage is applied to P1-62.
on the negative slope of the input pulse. The output of Z1 is a pulse of amplitude +4.5 Vdc (nominal) and is triggered when
the cosine signal crosses zero in the positive direction. The output pulse has a width of 2 psec which is determined by
NOTE
resistor R37 and capacitor C9. The output of Z1 is connected to FET switch S1 (pin 4).
The waveform shown in fig. 4-41 are system waveforms which are applicable to the
(f) The sinewave, of amplitude 10.29VPK, is connected through relays K19, K20 and capacitor C13 to the
circuit performance when the assembly is installed in DMS-D, but which do not
inverting input of operational amplifier AR6. Capacitor C13 averages out any d.c. offsets on the sinewave. The output of
necessarily apply to the circuit performance while tested in DMS-G.
AR6 is connected to Q1 and Q2 which are a complementary pair connected in a configuration to boost the current drive
capability. The AR6, Q1 and Q2 configuration, has a unity gain of minus 1. The output at the junction of Q1 and Q2 is a
(3) Sum and diff signal simulator C - A3 (fig. 4-42)
sinewave of amplitude 10.29 VPK (nominal), averaged about zero. This output is connected to FET switch S1 (pin 1)
The A3 circuit card is performance tested using DMS-D, DMS-G and test adapter A10, connector J4.
through resistor R38.
(a) This circuit card scales the sum and diff test voltages required for performance testing the tracker test set.
(g) When the monostable flip flop (Z1) is triggered, the +5 VPK, 2 psec pulse, switches the FET switch ON. This
The different voltage levels are selected by the use of relays connected across the scaling resistors. An IR control source
allows capacitor C10 (output of AR4) to be charged to the positive peak amplitude of the sinewave. AR4 is an inverting
calibration voltage is provided for calibrating the optical alignment fixture. A peak detector is also provided for measuring the
amplifier with a gain of minus 1, determined by resistors R38 and R39. The FET switch is turned ON only during the duration
peak amplitude of the sum and diff signals.
of the 2 msec pulse. At the end of the pulse, the FET switch is turned OFF and capacitor C10 retains its charge since it has
a very high discharge path determined by the
(b) The circuit card operates and is tested in the following manner: Initially a 7.280 Vdc reference voltage is
connected to P1-60. Relays K1 through K16 are energized as required to select the outputs across the scaling resistors. The
3-30.1