C2
TM 9-4935-481-14-1
(c) The scaling resistors that determine the tolerance band are programmed by means of the mode switch
and relays that are energized at different times throughout the test run. The nature of the signal being evaluated makes it
(f)
Other (non-automatic) positions of the mode switch rely on the operator for making the necessary
necessary to apply as many as three different tolerances to a single input.
measurements and evaluating the data. Manual adjustment of the error amplitude potentiometer is required for checkout of
trainer error comparators, and in this test the status lamps are used for a purpose other than displaying test results. The no-
(d) Sample pulse generation is accomplished with a precision voltage divider and relays that act as single-
go lamp monitors the state of UUT comparators, so that when the lamp turns on or off it is known that the comparators have
pole, single-throw switches. Taps along the voltage divider correspond to the expected amplitudes of the UUT signal at
switched. If the change-of-state occurs while the go lamp is illuminated, the comparator threshold has been proven to be in
various times, and by sequentially activating each relay for 200 msec, a series of pulses will result. The example below
tolerance.
shows how the pulses of paragraph (b) are generated:
(2) Frequency (Hz) switch. Testing of the trainer derate and filter networks requires the use of a low frequency
sine wave to check the attenuation vs frequency curve. Used in conjunction with the peak detector section, the low
frequency oscillator permits measurement of the circuit response for frequencies of 0.5, 1.0, 5.0 and 10.0 Hz. The basic
oscillator is a Wein bridge type, with an AGC loop for controlling the amplitude to 3.0 VP. Frequency switch S12 selects
various combinations of resistors in the legs of the bridge, which in turn set the frequency of oscillation. Detailed theory of
operation of this circuit can be found in the operational description of card A21.
(3) Transmitter lamp. The IR acquisition circuit in the MTS provides a visual indication of approximate sum
signal strength through use of a peak detector/lamp driver network. Turn-on limits of the lamp driver are specified to be 260
mvrms or greater, while the driver must be off for an input of 179 mvrms or less. These two levels are generated in the DMS
by an amplifier circuit whose input scaling resistors are selected by transmitter lamp switch Sll. In the go position of the
switch, the amplifier gain is such that the input reference of 10.29 VP (5 KHz) is attenuated to 260 mvrms, and the no-go
position scales the reference down to 179 mvrms. The off position removes the input to the amplifier so that the simulated
sum signal then goes to 0.
(4) Error amplitude. Error amplitude potentiometer R5 provides a variable dc stimuli of -5 to +5 Vdc to th e
trainer horizontal and vertical rate/position inputs. This stimuli is used primarily for checking the UUT error comparators, and
also for performing a self test on the DMS comparator circuits.
All relays are normally deenergized prior to the start of the program. For this example, K1 is activated immediately at test
(5) Test start. Initiation of the UUT and DMS test sequence is accomplished with test start switch S13.
start and remains energized for 202 msec, thus generating the first pulse. K2 and K3 follow at 1.702 seconds and 9.902
Momentary actuation of this switch results in the following: DMS logic is reset to prepare it for testing as in example X below,
seconds, respectively, to produce the remaining two pulses.
transition is made from logic "0" to logic "1" on the DMS counter reset line to allow the master clock to run as in example Y
below, and ground is removed from UUT trigger input to begin the test sequence as in example Z below.
(e) While only three samples are used to evaluate the function curves, a total of six are used for the
divide network curve. The method of generation is the same for all pulses.
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