TM 9-4935-481-14-1
C2
(f) Pin 9 on the relays is the control input. The 2K resistors at this input limit the control current to 2.7 ma
(g) Operational amplifier AR2 and associated components form a non-inverting amplifier having a gain of 10.
maximum (when driven by +5.5 Vdc). The minimum voltage required at the input to the 2K resistor to turn the relay ON is
(h) R18, R17, R31 and R26 are offset adjustment potentiometers. C7, C22, C25, C32 and C9 are compensation
1.2 Vdc.
capacitors required for stability of the circuits.
(i) S1 and S2 are FET switches. Each switch is equivalent to a two pole on-off switch. One switching path is
NOTE
from pin 1 to pin 2 and is controlled by the voltage at pin 4. The second switching path is between pins 9 and 8 and is
controlled by the voltage at pin 6. The control voltage required to turn the switch ON is from +2.4 Vdc to +5.5 Vdc. The
The waveforms shown in fig. 4-63 (schematic) are system waveforms which
control voltage required to turn the switch OFF is from O Vdc to +0.4 Vdc.
are applicable to the circuit performance when the assembly is installed in
DMS-D, but which do not necessarily apply to the circuit performance while
(j) Relays K1 through K8 have control input at pin 9. The 2K resistor at this input limits the control current.
tested in DMS-G.
NOTE
(25) DMS-G Board - 2A1 (fig. 4-65)
The waveforms shown in fig. 4-62 (schematic) are system waveforms which
are applicable to the circuit performance when the assembly is installed in
This assembly is performance tested using DMS-G, test adapter A12, connector J4.
DMS-D, but which do not necessarily apply to the circuit performance while
(a) The circuit of this assembly consists of digital integrated circuits, analog integrated circuits, relays, and
tested in DMS-G.
passive components. The digital circuits are tested by applying digital LOW and/or HIGH stimulus to appropriate pins on
connector P1 of the assembly and verifying appropriate outputs. The operation of the digital circuits is explained in Chapter
3, paragraph 3-3 (b
through h), of
this manual. The operation of
the analog circuits is
explained below.
(24) Composite function - A24 (fig. 4-63)
(b) The voltage divider composed of R1, R2 and R3 is tested by verifying its outputs.
This assembly is performance tested using DMS-D, DMS-G, and test adapter A9, connector J2.
(c) AR1 and associated components form a voltage comparator. Pin 10 of AR1 is the non-inverting input. Pin 1
(a) The circuit of this assembly consists of digital integrated circuits, analog integrated circuits, transistors, relays,
of AR1 is the inverting input. The high output of the comparator is limited to approximately +9.5 Vdc by an internal zener
and passive components. The operation of the analog circuits is explained below.
diode. The threshold voltage of this comparator is -2.500 Vdc (nominal) which is applied to P1-9. The output of this
comparator should switch from approximately O Vdc to approximately +9.5 Vdc when the input voltage at P1-7 crosses -2.5
(b) Operational amplifier AR5 and associated components form a unity gain differential amplifier.
Vdc while becoming more negative. Resistor R7 provides positive feedback which in effect causes the comparator to exhibit
(c) Operational amplifiers AR1 through AR4 are connected as unity gain noninverting buffers.
hysteresis making it less sensitive to noise on the input just after the input crosses the threshold voltage while going in the
more negative direction. The purpose of trim potentiometer R6 is to provide compensation for the input offset voltage of
(d) Resistors R14, R15 and capacitors C11 and C12 form a low pass filter. The -3 db frequencies above 0.4 Hz
AR1.
will be attenuated 40 db or more. The performance of this filter is tested by applying a 6V P-P, 20 Hz square wave, to the
input and verifying no readable square wave at the output.
(d) Operational amplifiers AR2 and AR3 and their associated components form two unity-gain inverting
amplifiers. R9, R1O, R12 and R14 are gain determining
(e) Resistors R17, R18 and capacitors C15 and C16 form a low pass filter identical to the filter described above.
3-30.20