TM 9-4935-481-14-1
C2
(c) Operational amplifiers AR2 and AR3 with their associated components form two independent unity-gain non-
resistors. Resistors R11 and R13 minimize the dc offset caused by the input bias current of AR2 and AR3.
inverting buffers. Resistors R14 and R18 protect the amplifiers in case of inadvertant overload. Resistors R15 and R19
(e) Capacitors C6, C9 and C12 are required to prevent oscillations in the circuits.
minimize the dc offset due to the input bias current of the operational amplifiers. Capacitors C15, C16, C19, C20 and
resistors R16, R17, R20 and R21 are required for stability of the circuits.
(f) Pin 9 on the relays is the control input. The 2K resistors at the inputs limit the control current to 1.25 ma
maximum (when driven by logic gates). The minimum voltage required at the input to the 2K resistor to turn the relay ON is
+1.2 Vdc.
3-5. DMS-G Electrical and Electronic Modes of Operation.
a. The primary function of the DMS-G is to interface the power, stimuli and monitor functions of the DMS-D to
NOTE
each UUT. Active circuitry has been minimized and is used only where the required functions are not available from the
DMS-D. Most of the UUT's have similar power, switching, and monitor requirements which permit the sharing of these
The waveforms shown in fig. 4-65 (schematic) are system waveforms which
functions with other UUT's. Some parameters must be tailored to a specific UUT because of discrete differences such as
are applicable to the circuit performance when the assembly is installed in
connector types, pin function assignments and electrical requirements.
DMS-D, but which do not necessarily apply to the circuit performance while
tested in DMS-G.
b. In general, the DMS-G provides the common elements in the test controls section of the panel and handles
the requirements of each UUT with an interfacing adapter. Table 3-7 identifies the adapters and lists the UUT's associated
with adapters Al through A14. The adapters connect to the front panel of the DMS-G at the UUT INTERFACE connector, J1.
(26) DMS fault isolation - 2A2 (fig. 4-66)
c. The tracker CSCB has an electrical connector which environmentally seals itself when it is mechanically
This assembly is performance tested using DMS-G, test adapter A12, connector J4.
disconnected. Because of this provision, the CSCB requires special handling during testing to prevent damage to both the
electrical connector and the circuit card assembly. The CSC section of the DMS-G allows safe, non-destructive mounting of
(a) The circuit of this assembly consists of digital integrated circuits, analog integrated circuits, and passive
the CSCB, and electrically interfaces the unit with all required stimuli and monitor functions of the DMS.
components. The digital integrated circuits are tested by applying digital LOW and/or HIGH stimulus to appropriate pins on
connector P1 of the assembly and verifying appropriate outputs. The operation of the digital circuits is explained in Chapter
d. The nutator test adapter differs from the others in that it connects to DMS-D connector J6 (using cable 2W1).
3, paragraph 3-3 (b through h), of this manual. The operation of the analog circuit is explained below.
The nutator testing does not require use of the DMS-G, but the adapter is stored in the DMS-G since the testing requires use
of a laminar flow bench which is only available at the G/S maintenance level.
(b) Resistor R9 and capacitor C8 provide 90phase shift for the 5 KHz sinusoidal input and also cause the signal
to be attenuated to 0.01061 of its original amplitude. The output of this RC network is fed to the non-inverting input of
e. The DMS-G may be subdivided into two basic functional sections, a circuit card/subassemblies section and a
operational amplifier AR1, which together with gain determine resistors R10 and R11 and stabilizing network composed of
control signal comparator section. A vertical line down the center of the DMS-G front panel (fig. 3-32) splits these two
C11, C12, R12 and R13, form a non-inverting amplifier with a gain of 21. The combined gain of the circuit between P1-3 and
sections. Refer to DMS-G block diagram, fig. 3-33.
P1-4 is 0.2228. The equation below shows how the various components affect the output at P1-4 for the 5 KHz signal.
(1) Circuit card/subassemblies. With the exception of the circuitry described below, the functions of the
Gain P1-3 to P14 = [(R10 + R11) - (31.416 x R9 x R01 X C8)]
test control switches and potentiometers can be easily
where: R is in kilo-ohms and C is in mf
3-31
