TM 9-4935-481-14-1
C2
(j) To test for spurious oscillations in voltage comparators AR2 and AR4, and in the four-mode amplifier AR5, the
digital comparator, also known as EXCLUSIVE NOR or INVERTED EXCLUSIVE OR, consisting of two inverters (Z1) and
period of the trapezoidal wave at P1-36 is monitored. The oscillations in the above circuits cause period jitter (variation) of
three NAND gates (Z2). The output of this digital comparator (Z2-6) is HIGH when the outputs of AR2 and AR4 are both in
the trapezoidal waveform at P1-36. When comparators AR2 and AR4 switch in response to the sinusoidal inputs, some short
the same state, either both LOW or both HIGH. When the output of one comparator is LOW and the other is HIGH, the
duration ringing is permissible in their outputs. This will cause some period jitter at P1-36 which is reflected by the period
output of the digital comparator is LOW.
variation tolerance in the test procedure using DMS-G. Although amplifier AR5 does not have a tendency to oscillate, any
(f) Amplifier AR5, voltage comparators AR6, and AR7, analog switches Q2, Q3, Q4 and Q5, and the associated
noise on its inputs or outputs will have similar effect on the period jitter as the ringing in comparators.
digital circuitry form a programmable four-mode circuit. The four modes of operation are as follows:
(k) The duration of negative ramp (mode-2) and positive ramp (mode-4) at the output of AR5 (TP6) is the same
1. Mode 1 - Unity gain non-inverting amplifier (follower with 0 volts input).
(553 psec nominal) and is determined by R13 and C25 for mode-l, and by R14 and C25 for mode-4. Any excessive leakage
or excessive ON resistance in one of the FET analog switches (Q2, Q3, Q4 and Q5) associated with AR5 will cause errors in
2. Mode 2 - Integrator-inverter with +5 Vdc input.
the duration of these ramps.
3. Mode 3 - Unity gain inverting amplifier with +5 Vdc input.
4. Mode 4 - Integrator-inverter with -5 Vdc input.
NOTE
(g) This four-mode circuit is in part controlled by the output of the digital comparator described above. When the
The waveforms shown in fig. 4-59 (schematic) are system
output of the digital comparator changes from LOW to HIGH, this starts an integrating inverting mode with +5 Vdc input,
waveforms which are applicable to the circuit performance when the
causing a negative going ramp at the output (AR5-8). The slope of this ramp is constant and established by R13 and C25.
assembly is installed in DMS-D, but which do not necessarily apply
When the output reaches -5 Vdc, voltage comparator AR6 senses this event, and causes the circuit to go into the unity gain
to the circuit performance while tested in DMS-G.
inverting mode with +5 Vdc input, causing the output to stay at -5 Vdc. Later, when the output of the digital comparator goes
from HIGIH to LOW, this starts another integrating-inverting mode, but this time with -5 Vdc input, which causes a positive
going ramp at the output of AR5. When this output reaches 0 volts, volt comparator AR7 causes the circuit to go into the
(21) Tracker detector simulator C - A21 (fig. 4-60)
unity gain non-inverting mode with zero volts input, causing the output to remain at zero volts until the next command from
the digital comparator in which the cycle starts again. The cycle is repeated continuously producing a trapezoidal waveform
This assembly is performance tested using DMS-D, DMS-G, and test adapter A9, connector J2.
at the output of AR5 (TP6). The purpose of the low-pass filter consisting of R24, C32, R25 and C33 is to round the corners of
the trapezoidal waveform. The output of this low-pass filter is fed to the unity gain non-inverting amplifier (buffer) AR8.
(a) The circuit of this assembly consists of analog integrated circuits, transistors, and passive components. The
Table 3-1.3 lists the states of
various active components of
the four-mode circuit for each of
the four modes.
operation of the circuit when performance tested using DMS-G is explained below.
(h) To test the accuracy of the circuit in mode-1 the circuit is stopped in this mode by applying +5 Vdc to P1-17
(b) The functions of this card are as follows:
and -5 Vdc to Pl-19. The output of the digital comparator is now a steady LOW. The output of AR5 goes to a steady O Vdc
1. Generating a 5V P-P sinewave with a dc component of +2.5 Vdc, at an adjustable frequency from 4.5 KHz to
level. The accuracy is now checked by measuring the buffered output at P1-36.
12 KHz.
(i) To test the accuracy of the circuit in MODE-3 the circuit is stopped in this mode by applying +5 Vdc to P1-17,
and to Pl-19. The output of the digital comparator is now steady HIGH. Which causes the output of AR5 to go to a steady -5
Vdc level. The accuracy is now checked by measuring the buffered output at P1-36.
3-30.16